15 citations · 32 across the 7 of their papers we have counts for
3 papers · 1 filter
SPARTA: A Divide and Conquer Approach to Address Translation for Accelerators
Javier Picorel, Seyed Alireza Sanaee Kohroudi, Zi Yan +3
Virtual memory (VM) is critical to the usability and programmability of hardware accelerators. Unfortunately, implementing accelerator VM efficiently is challenging because the are…
Exploiting Errors for Efficiency: A Survey from Circuits to Algorithms
Phillip Stanley-Marbell, Armin Alaghi, Michael Carbin +13
When a computational task tolerates a relaxation of its specification or when an algorithm tolerates the effects of noise in its execution, hardware, programming languages, and sys…
Near-Memory Address Translation
Javier Picorel, Djordje Jevdjic, Babak Falsafi
Memory and logic integration on the same chip is becoming increasingly cost effective, creating the opportunity to offload data-intensive functionality to processing units placed i…