8 papers
TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-based FPGAs
Weikang Qiao, Licheng Guo, Zhenman Fang +2
The emergence of high-bandwidth memory (HBM) brings new opportunities to boost the performance of sorting acceleration on FPGAs, which was conventionally bounded by the available o…
TENET: A Framework for Modeling Tensor Dataflow Based on Relation-centric Notation
Liqiang Lu, Naiqing Guan, Yuyue Wang +5
Accelerating tensor applications on spatial architectures provides high performance and energy-efficiency, but requires accurate performance models for evaluating various dataflow…
When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization
Young-kyu Choi, Yuze Chi, Jie Wang +2
With the recent release of High Bandwidth Memory (HBM) based FPGA boards, developers can now exploit unprecedented external memory bandwidth. This allows more memory-bounded applic…
Optimality Study of Existing Quantum Computing Layout Synthesis Tools
Bochen Tan, Jason Cong
Layout synthesis, an important step in quantum computing, processes quantum circuits to satisfy device layout constraints. In this paper, we construct QUEKO benchmarks for this pro…
Rapid Cycle-Accurate Simulator for High-Level Synthesis
Yuze Chi, Young-kyu Choi, Jason Cong +1
A large semantic gap between the high-level synthesis (HLS) design and the low-level (on-board or RTL) simulation environment often creates a barrier for those who are not FPGA exp…
AutoAccel: Automated Accelerator Generation and Optimization with Composable, Parallel and Pipeline Architecture
Jason Cong, Peng Wei, Cody Hao Yu +1
CPU-FPGA heterogeneous architectures are attracting ever-increasing attention in an attempt to advance computational capabilities and energy efficiency in today's datacenters. Thes…