109 citations · 463 across the 26 of their papers we have counts for
27 papers
Fine Grain 3D Integration for Microarchitecture Design Through Cube Packing Exploration
Yongxiang Liu, Yuchun Ma, Eren Kurshan +2
Most previous 3D IC research focused on stacking traditional 2D silicon layers, so the interconnect reduction is limited to inter-block delays. In this paper, we propose techniques…
ProgSG: Cross-Modality Representation Learning for Programs in Electronic Design Automation
Yunsheng Bai, Atefeh Sohrabizadeh, Zongyue Qin +3
Recent years have witnessed the growing popularity of domain-specific accelerators (DSAs), such as Google's TPUs, for accelerating various applications such as deep learning, searc…
Compiling Quantum Circuits for Dynamically Field-Programmable Neutral Atoms Array Processors
Daniel Bochen Tan, Dolev Bluvstein, Mikhail D. Lukin +1
Dynamically field-programmable qubit arrays (DPQA) have recently emerged as a promising platform for quantum information processing. In DPQA, atomic qubits are selectively loaded i…
Locality and Utilization in Placement Suboptimality
Jason Cong, Michalis Romesis, Joseph R. Shinnerl +2
The mixed-size placement benchmarks described in this book chapter directly address several of the shortcomings in previously published suboptimality benchmarks. Two new sets of pl…
CHARM: Composing Heterogeneous Accelerators for Matrix Multiply on Versal ACAP Architecture
Jinming Zhuang, Jason Lau, Hanchen Ye +10
Dense matrix multiply (MM) serves as one of the most heavily used kernels in deep learning applications. To cope with the high computation demands of these applications, heterogene…
Domain-Specific Quantum Architecture Optimization
Wan-Hsuan Lin, Bochen Tan, Murphy Yuezhen Niu +2
With the steady progress in quantum computing over recent years, roadmaps for upscaling quantum processors have relied heavily on the targeted qubit architectures. So far, similarl…
TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-based FPGAs
Weikang Qiao, Licheng Guo, Zhenman Fang +2
The emergence of high-bandwidth memory (HBM) brings new opportunities to boost the performance of sorting acceleration on FPGAs, which was conventionally bounded by the available o…
Search for Optimal Systolic Arrays: A Comprehensive Automated Exploration Framework and Lessons Learned
Jie Wang, Jason Cong
Systolic arrays have been widely used for accelerating HPC and deep learning applications. There is a plethora of previous works on the performance tuning of systolic arrays, but u…
Enabling Automated FPGA Accelerator Optimization Using Graph Neural Networks
Atefeh Sohrabizadeh, Yunsheng Bai, Yizhou Sun +1
High-level synthesis (HLS) has freed the computer architects from developing their designs in a very low-level language and needing to exactly specify how the data should be transf…
SPA-GCN: Efficient and Flexible GCN Accelerator with an Application for Graph Similarity Computation
Atefeh Sohrabizadeh, Yuze Chi, Jason Cong
While there have been many studies on hardware acceleration for deep learning on images, there has been a rather limited focus on accelerating deep learning applications involving…
Serpens: A High Bandwidth Memory Based Accelerator for General-Purpose Sparse Matrix-Vector Multiplication
Linghao Song, Yuze Chi, Licheng Guo +1
Sparse matrix-vector multiplication (SpMV) multiplies a sparse matrix with a dense vector. SpMV plays a crucial role in many applications, from graph analytics to deep learning. Th…
Pyxis: An Open-Source Performance Dataset of Sparse Accelerators
Linghao Song, Yuze Chi, Jason Cong
Specialized accelerators provide gains of performance and efficiency in specific domains of applications. Sparse data structures or/and representations exist in a wide range of app…
Optimal Qubit Mapping with Simultaneous Gate Absorption
Bochen Tan, Jason Cong
Before quantum error correction (QEC) is achieved, quantum computers focus on noisy intermediate-scale quantum (NISQ) applications. Compared to the well-known quantum algorithms re…
Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication
Linghao Song, Yuze Chi, Atefeh Sohrabizadeh +3
Sparse-Matrix Dense-Matrix multiplication (SpMM) is the key operator for a wide range of applications, including scientific computing, graph processing, and deep learning. Architec…
Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition
Saranyu Chattopadhyay, Florian Lonsing, Luca Piccolboni +12
Hardware accelerators (HAs) are essential building blocks for fast and energy-efficient computing systems. Accelerator Quick Error Detection (A-QED) is a recent formal technique wh…
TENET: A Framework for Modeling Tensor Dataflow Based on Relation-centric Notation
Liqiang Lu, Naiqing Guan, Yuyue Wang +5
Accelerating tensor applications on spatial architectures provides high performance and energy-efficiency, but requires accurate performance models for evaluating various dataflow…
When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization
Young-kyu Choi, Yuze Chi, Jie Wang +2
With the recent release of High Bandwidth Memory (HBM) based FPGA boards, developers can now exploit unprecedented external memory bandwidth. This allows more memory-bounded applic…
AutoDSE: Enabling Software Programmers to Design Efficient FPGA Accelerators
Atefeh Sohrabizadeh, Cody Hao Yu, Min Gao +1
Adopting FPGA as an accelerator in datacenters is becoming mainstream for customized computing, but the fact that FPGAs are hard to program creates a steep learning curve for softw…
Extending High-Level Synthesis for Task-Parallel Programs
Yuze Chi, Licheng Guo, Jason Lau +3
C/C++/OpenCL-based high-level synthesis (HLS) becomes more and more popular for field-programmable gate array (FPGA) accelerators in many application domains in recent years, thank…
Optimal Layout Synthesis for Quantum Computing
Bochen Tan, Jason Cong
Recent years have witnessed the fast development of quantum computing. Researchers around the world are eager to run larger and larger quantum algorithms that promise speedups impo…
Optimality Study of Existing Quantum Computing Layout Synthesis Tools
Bochen Tan, Jason Cong
Layout synthesis, an important step in quantum computing, processes quantum circuits to satisfy device layout constraints. In this paper, we construct QUEKO benchmarks for this pro…
Rapid Cycle-Accurate Simulator for High-Level Synthesis
Yuze Chi, Young-kyu Choi, Jason Cong +1
A large semantic gap between the high-level synthesis (HLS) design and the low-level (on-board or RTL) simulation environment often creates a barrier for those who are not FPGA exp…
AutoAccel: Automated Accelerator Generation and Optimization with Composable, Parallel and Pipeline Architecture
Jason Cong, Peng Wei, Cody Hao Yu +1
CPU-FPGA heterogeneous architectures are attracting ever-increasing attention in an attempt to advance computational capabilities and energy efficiency in today's datacenters. Thes…
Computed Tomography Image Enhancement using 3D Convolutional Neural Network
Meng Li, Shiwen Shen, Wen Gao +2
Computed tomography (CT) is increasingly being used for cancer screening, such as early detection of lung cancer. However, CT studies have varying pixel spacing due to differences…