17 citations · 44 across the 8 of their papers we have counts for
Showing 2020 · cs.DCShow all
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cs.DC2020★ 7 cited
Stretching the capacity of Hardware Transactional Memory in IBM POWER architectures
Ricardo Filipe, Shady Issa, Paolo Romano +1
The hardware transactional memory (HTM) implementations in commercially available processors are significantly hindered by their tight capacity constraints. In practice, this rende…
cs.DC2020★ 17 cited
Bandwidth-Aware Page Placement in NUMA
David Gureya, João Neto, Reza Karimi +6
Page placement is a critical problem for memoryintensive applications running on a shared-memory multiprocessor with a non-uniform memory access (NUMA) architecture. State-of-the-a…