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cs.DC2020
Stretching the capacity of Hardware Transactional Memory in IBM POWER architectures
Ricardo Filipe, Shady Issa, Paolo Romano +1
The hardware transactional memory (HTM) implementations in commercially available processors are significantly hindered by their tight capacity constraints. In practice, this rende…
cs.DC2019
Lynceus: Cost-efficient Tuning and Provisioning of Data Analytic Jobs
Maria Casimiro, Diego Didona, Paolo Romano +3
Modern data analytic and machine learning jobs find in the cloud a natural deployment platform to satisfy their notoriously large resource requirements. Yet, to achieve cost effici…
cs.DC2019
HeTM: Transactional Memory for Heterogeneous Systems
Daniel Castro, Paolo Romano, Aleksandar Ilic +1
Modern heterogeneous computing architectures, which couple multi-core CPUs with discrete many-core GPUs (or other specialized hardware accelerators), enable unprecedented peak perf…