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researcher

D. Boland

6 papers hereh-index 16690 citations51 works total

Matching runs newest-first, so older work may not be attached to this profile yet.

author position
  • middle author6

Across the 6 of 6 papers where every author was matched, so the position is known.

fields
  • cs.AR3
  • eess.SP3

identity via Semantic Scholar / OpenAlex

activity
20192025
most citedAddNet: Deep Neural Networks Using FPGA-Optimized Multipliers

67 citations · 95 across the 5 of their papers we have counts for

collaborators
Showing 2020Show all

2 papers · 1 filter

cs.AR2020★ 14 cited

LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations

SeyedRamin Rasoulinezhad, Siddhartha, Hao Zhou +3

We propose two tiers of modifications to FPGA logic cell architecture to deliver a variety of performance and utilization benefits with only minor area overheads. In the irst tier,…

eess.SP2020★ 7 cited

MajorityNets: BNNs Utilising Approximate Popcount for Improved Efficiency

Seyedramin Rasoulinezhad, Sean Fox, Hao Zhou +3

Binarized neural networks (BNNs) have shown exciting potential for utilising neural networks in embedded implementations where area, energy and latency constraints are paramount. W…

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