14 citations · 36 across the 5 of their papers we have counts for
5 papers
Low Error-Rate Approximate Multiplier Design for DNNs with Hardware-Driven Co-Optimization
Yao Lu, Jide Zhang, Su Zheng +2
In this paper, two approximate 3*3 multipliers are proposed and the synthesis results of the ASAP-7nm process library justify that they can reduce the area by 31.38% and 36.17%, an…
HEAM: High-Efficiency Approximate Multiplier Optimization for Deep Neural Networks
Su Zheng, Zhen Li, Yao Lu +3
We propose an optimization method for the automatic design of approximate multipliers, which minimizes the average error according to the operand distributions. Our multiplier achi…
LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations
SeyedRamin Rasoulinezhad, Siddhartha, Hao Zhou +3
We propose two tiers of modifications to FPGA logic cell architecture to deliver a variety of performance and utilization benefits with only minor area overheads. In the irst tier,…
MajorityNets: BNNs Utilising Approximate Popcount for Improved Efficiency
Seyedramin Rasoulinezhad, Sean Fox, Hao Zhou +3
Binarized neural networks (BNNs) have shown exciting potential for utilising neural networks in embedded implementations where area, energy and latency constraints are paramount. W…
High-performance K-means Implementation based on a Simplified Map-Reduce Architecture
Zhehao Li, Jifang Jin, Lingli Wang
The k-means algorithm is one of the most common clustering algorithms and widely used in data mining and pattern recognition. The increasing computational requirement of big data a…