1 citations · 1 across the 4 of their papers we have counts for
5 papers
Accelerating HDC-CNN Hybrid Models Using Custom Instructions on RISC-V GPUs
Wakuto Matsumi, Riaz-Ul-Haque Mian
Machine learning based on neural networks has advanced rapidly, but the high energy consumption required for training and inference remains a major challenge. Hyperdimensional Comp…
Optimizing FPGA and Wafer Test Coverage with Spatial Sampling and Machine Learning
Wang WeiQuan, Riaz-ul-Haque Mian
In semiconductor manufacturing, testing costs remain significantly high, especially during wafer and FPGA testing. To reduce the number of required tests while maintaining predicti…
Approach to Visual Attractiveness of Event Space Through Data-Driven Environment and Spatial Perception
Aliffi Majiid, Riaz-Ul-Haque Mian, Kouki Kurohara +1
Revitalizing Japan's remote areas has become a crucial task, and Matsue City exemplifies this effort in its temporary event spaces, created through collective efforts to foster urb…
Wafer-level Variation Modeling for Multi-site RF IC Testing via Hierarchical Gaussian Process
Michihiro Shintani, Riaz-Ul-Haque Mian, Tomoki Nakamura +3
Wafer-level performance prediction has been attracting attention to reduce measurement costs without compromising test quality in production tests. Although several efficient metho…
Cycle-Accurate Evaluation of Software-Hardware Co-Design of Decimal Computation in RISC-V Ecosystem
Riaz-ul-haque Mian, Michihiro Shintani, Michiko Inoue
Software-hardware co-design solutions for decimal computation can provide several Pareto points to development of embedded systems in terms of hardware cost and performance. This p…