3 citations · 4 across the 3 of their papers we have counts for
3 papers
cs.DC2024
Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL
Marius Meyer, Tobias Kenter, Lucian Petrica +3
Most FPGA boards in the HPC domain are well-suited for parallel scaling because of the direct integration of versatile and high-throughput network ports. However, the utilization o…
cs.DC2022★ 1 cited
Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks
Marius Meyer, Tobias Kenter, Christian Plessl
While FPGA accelerator boards and their respective high-level design tools are maturing, there is still a lack of multi-FPGA applications, libraries, and not least, benchmarks and…
cs.DC2020★ 3 cited
Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of the HPCChallenge Benchmark Suite
Marius Meyer, Tobias Kenter, Christian Plessl
FPGAs have found increasing adoption in data center applications since a new generation of high-level tools have become available which noticeably reduce development time for FPGA…