activity
20152022
most citedHigh-Throughput In-Memory Computing for Binary Deep Neural Networks with Monolithically Integrated RRAM and 90nm CMOS

169 citations · 368 across the 10 of their papers we have counts for

collaborators

10 papers

cs.RO2022★ 15 cited

A wearable sensor vest for social humanoid robots with GPGPU, IoT, and modular software architecture

Mohsen Jafarzadeh, Stephen Brooks, Shimeng Yu +2

Currently, most social robots interact with their surroundings and humans through sensors that are integral parts of the robots, which limits the usability of the sensors, human-ro…

cond-mat.mtrl-sci2021★ 64 cited

Antiferroelectric negative capacitance from a structural phase transition in zirconia

Michael Hoffmann, Zheng Wang, Nujhat Tasneem +20

Crystalline materials with broken inversion symmetry can exhibit a spontaneous electric polarization, which originates from a microscopic electric dipole moment. Long-range polar o…

cs.LG2021

Mitigating Adversarial Attack for Compute-in-Memory Accelerator Utilizing On-chip Finetune

Shanshi Huang, Hongwu Jiang, Shimeng Yu

Compute-in-memory (CIM) has been proposed to accelerate the convolution neural network (CNN) computation by implementing parallel multiply and accumulation in analog domain. Howeve…

cs.AR2020★ 3 cited

SMART Paths for Latency Reduction in ReRAM Processing-In-Memory Architecture for CNN Inference

Sho Ko, Shimeng Yu

This research work proposes a design of an analog ReRAM-based PIM (processing-in-memory) architecture for fast and efficient CNN (convolutional neural network) inference. For the o…

eess.SP2020★ 8 cited

New Security Challenges on Machine Learning Inference Engine: Chip Cloning and Model Reverse Engineering

Shanshi Huang, Xiaochen Peng, Hongwu Jiang +2

Machine learning inference engine is of great interest to smart edge computing. Compute-in-memory (CIM) architecture has shown significant improvements in throughput and energy eff…

cs.ET2020★ 8 cited

DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Training

Xiaochen Peng, Shanshi Huang, Hongwu Jiang +2

DNN+NeuroSim is an integrated framework to benchmark compute-in-memory (CIM) accelerators for deep neural networks, with hierarchical design options from device-level, to circuit-l…