475 citations · 1.3k across the 20 of their papers we have counts for
9 papers · 1 filter
Memory-Efficient Dataflow Inference for Deep CNNs on FPGA
Lucian Petrica, Tobias Alonso, Mairin Kroes +3
Custom dataflow Convolutional Neural Network (CNN) inference accelerators on FPGA are tailored to a specific CNN topology and store parameters in On-Chip Memory (OCM), resulting in…
Fanout of 2 Triangle Shape Spin Wave Logic Gates
Abdulqader Mahmoud, Frederic Vanderveken, Florin Ciubotaru +3
Having multi-output logic gates saves much energy because the same structure can be used to feed multiple inputs of next stage gates simultaneously. This paper proposes novel trian…
2-input 4-output Programmable Spin Wave Logic Gate
Abdulqader Mahmoud, Frederic Vanderveken, Christoph Adelmann +3
To bring Spin Wave (SW) based computing paradigm into practice and develop ultra low power Magnonic circuits and computation platforms, one needs basic logic gates that operate and…
Multi-frequency Data Parallel Spin Wave Logic Gates
Abdulqader Mahmoud, Frederic Vanderveken, Christoph Adelmann +3
By their very nature, Spin Waves (SWs) with different frequencies can propagate through the same waveguide without affecting each other, while only interfering with their own speci…
An Introduction to Spin Wave Computing
Abdulqader Mahmoud, Florin Ciubotaru, Frederic Vanderveken +4
This paper provides a tutorial overview over recent vigorous efforts to develop computing systems based on spin waves instead of charges and voltages. Spin-wave computing can be co…
Spin Wave Normalization Towards all Magnonic Circuits
Abdulqader Mahmoud, Frederic Vanderveken, Christoph Adelmann +3
The key enabling factor for Spin Wave (SW) technology utilization for building ultra low power circuits is the ability to energy efficiently cascade SW basic computation blocks. SW…
Efficient Computation Reduction in Bayesian Neural Networks Through Feature Decomposition and Memorization
Xiaotao Jia, Jianlei Yang, Runze Liu +3
Bayesian method is capable of capturing real world uncertainties/incompleteness and properly addressing the over-fitting issue faced by deep neural networks. In recent years, Bayes…
Evolutionary Bin Packing for Memory-Efficient Dataflow Inference Acceleration on FPGA
Mairin Kroes, Lucian Petrica, Sorin Cotofana +1
Convolutional neural network (CNN) dataflow inference accelerators implemented in Field Programmable Gate Arrays (FPGAs) have demonstrated increased energy efficiency and lower lat…
Memristive oscillatory circuits for resolution of NP-complete logic puzzles: Sudoku case
Theodoros Panagiotis Chatzinikolaou, Iosif-Angelos Fyrigos, Rafailia-Eleni Karamani +4
Memristor networks are capable of low-power and massive parallel processing and information storage. Moreover, they have presented the ability to apply for a vast number of intelli…