137 citations · 511 across the 22 of their papers we have counts for
22 papers
Variability-Aware Approximate Circuit Synthesis via Genetic Optimization
Konstantinos Balaskas, Florian Klemme, Georgios Zervakis +3
One of the major barriers that CMOS devices face at nanometer scale is increasing parameter variation due to manufacturing imperfections. Process variations severely inhibit the re…
Federated Learning for Computationally-Constrained Heterogeneous Devices: A Survey
Kilian Pfeiffer, Martin Rapp, Ramin Khalili +1
With an increasing number of smart devices like internet of things (IoT) devices deployed in the field, offloadingtraining of neural networks (NNs) to a central server becomes more…
Aggregating Capacity in FL through Successive Layer Training for Computationally-Constrained Devices
Kilian Pfeiffer, Ramin Khalili, Jörg Henkel
Federated learning (FL) is usually performed on resource-constrained edge devices, e.g., with limited memory for the computation. If the required memory to train a model exceeds th…
Model-to-Circuit Cross-Approximation For Printed Machine Learning Classifiers
Giorgos Armeniakos, Georgios Zervakis, Dimitrios Soudris +2
Printed electronics (PE) promises on-demand fabrication, low non-recurring engineering costs, and sub-cent fabrication costs. It also allows for high customization that would be in…
Co-Design of Approximate Multilayer Perceptron for Ultra-Resource Constrained Printed Circuits
Giorgos Armeniakos, Georgios Zervakis, Dimitrios Soudris +2
Printed Electronics (PE) exhibits on-demand, extremely low-cost hardware due to its additive manufacturing process, enabling machine learning (ML) applications for domains that fea…
Hardware-Aware Automated Neural Minimization for Printed Multilayer Perceptrons
Argyris Kokkinis, Georgios Zervakis, Kostas Siozios +2
The demand of many application domains for flexibility, stretchability, and porosity cannot be typically met by the silicon VLSI technologies. Printed Electronics (PE) has been int…
Approximate Computing and the Efficient Machine Learning Expedition
Jörg Henkel, Hai Li, Anand Raghunathan +4
Approximate computing (AxC) has been long accepted as a design alternative for efficient system implementation at the cost of relaxed accuracy requirements. Despite the AxC researc…
Energy-efficient DNN Inference on Approximate Accelerators Through Formal Property Exploration
Ourania Spantidi, Georgios Zervakis, Iraklis Anagnostopoulos +1
Deep Neural Networks (DNNs) are being heavily utilized in modern applications and are putting energy-constraint devices to the test. To bypass high energy consumption issues, appro…
Agent-based Constraint Solving for Resource Allocation in Manycore Systems
Volker Wenzel, Lars Bauer, Wolfgang Schröder-Preikschat +1
For efficiency reasons, manycore systems are increasingly heterogeneous, which makes the mapping of complex workloads a key problem with a high optimization potential. Constraints…
Hardware Approximate Techniques for Deep Neural Network Accelerators: A Survey
Giorgos Armeniakos, Georgios Zervakis, Dimitrios Soudris +1
Deep Neural Networks (DNNs) are very popular because of their high performance in various cognitive tasks in Machine Learning (ML). Recent advancements in DNNs have brought beyond…
Automated Design Approximation to Overcome Circuit Aging
Konstantinos Balaskas, Georgios Zervakis, Hussam Amrouch +2
Transistor aging phenomena manifest themselves as degradations in the main electrical characteristics of transistors. Over time, they result in a significant increase of cell propa…
Cross-Layer Approximation For Printed Machine Learning Circuits
Giorgos Armeniakos, Georgios Zervakis, Dimitrios Soudris +2
Printed electronics (PE) feature low non-recurring engineering costs and low per unit-area fabrication costs, enabling thus extremely low-cost and on-demand hardware. Such low-cost…
CoCoFL: Communication- and Computation-Aware Federated Learning via Partial NN Freezing and Quantization
Kilian Pfeiffer, Martin Rapp, Ramin Khalili +1
Devices participating in federated learning (FL) typically have heterogeneous communication, computation, and memory resources. However, in synchronous FL, all devices need to fini…
AdaPT: Fast Emulation of Approximate DNN Accelerators in PyTorch
Dimitrios Danopoulos, Georgios Zervakis, Kostas Siozios +2
Current state-of-the-art employs approximate multipliers to address the highly increased power demands of DNN accelerators. However, evaluating the accuracy of approximate DNNs is…
DISTREAL: Distributed Resource-Aware Learning in Heterogeneous Systems
Martin Rapp, Ramin Khalili, Kilian Pfeiffer +1
We study the problem of distributed training of neural networks (NNs) on devices with heterogeneous, limited, and time-varying availability of computational resources. We present a…
CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems
Lokesh Siddhu, Rajesh Kedia, Shailja Pandey +4
Processing cores and the accompanying main memory working in tandem enable the modern processors. Dissipating heat produced from computation, memory access remains a significant pr…
Positive/Negative Approximate Multipliers for DNN Accelerators
Ourania Spantidi, Georgios Zervakis, Iraklis Anagnostopoulos +2
Recent Deep Neural Networks (DNNs) managed to deliver superhuman accuracy levels on many AI tasks. Several applications rely more and more on DNNs to deliver sophisticated services…
Reliability-Aware Quantization for Anti-Aging NPUs
Sami Salamin, Georgios Zervakis, Ourania Spantidi +3
Transistor aging is one of the major concerns that challenges designers in advanced technologies. It profoundly degrades the reliability of circuits during its lifetime as it slows…
Control Variate Approximation for DNN Accelerators
Georgios Zervakis, Ourania Spantidi, Iraklis Anagnostopoulos +2
In this work, we introduce a control variate approximation technique for low error approximate Deep Neural Network (DNN) accelerators. The control variate technique is used in Mont…
Power Side-Channel Attacks in Negative Capacitance Transistor (NCFET)
Johann Knechtel, Satwik Patnaik, Mohammed Nabeel +5
Side-channel attacks have empowered bypassing of cryptographic components in circuits. Power side-channel (PSC) attacks have received particular traction, owing to their non-invasi…
Hardware Trojan Detection Using Controlled Circuit Aging
Virinchi Roy Surabhi, Prashanth Krishnamurthy, Hussam Amrouch +4
This paper reports a novel approach that uses transistor aging in an integrated circuit (IC) to detect hardware Trojans. When a transistor is aged, it results in delays along sever…
SoftWear: Software-Only In-Memory Wear-Leveling for Non-Volatile Main Memory
Christian Hakert, Kuan-Hsun Chen, Paul R. Genssler +5
Several emerging technologies for byte-addressable non-volatile memory (NVM) have been considered to replace DRAM as the main memory in computer systems during the last years. The…