47 citations · 92 across the 7 of their papers we have counts for
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cs.AR2023
SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators
Victor J. B. Jung, Arne Symons, Linyan Mei +2
To meet the growing need for computational power for DNNs, multiple specialized hardware architectures have been proposed. Each DNN layer should be mapped onto the hardware with th…
cs.AR2023★ 47 cited
TinyVers: A Tiny Versatile System-on-chip with State-Retentive eMRAM for ML Inference at the Extreme Edge
Vikram Jain, Sebastian Giraldo, Jaro De Roose +3
Extreme edge devices or Internet-of-thing nodes require both ultra-low power always-on processing as well as the ability to do on-demand sampling and processing. Moreover, support…