42 citations · 202 across the 30 of their papers we have counts for
32 papers
CREDIT: Cost-guided Reduction-reuse with Efficient DSMEM Inter-CTA Tiling
Zhengxiong Li, Tsung-Wei Huang, Umit Ogras
NVIDIA distributed shared memory (DSMEM) enables direct shared-memory access within a thread block cluster. However, cluster synchronization, remote access, and resource costs make…
HYDRA: A Heterogeneous Chiplet DSE Framework for Serving Dynamic Hybrid LLM Workloads
Jiahao Lin, Alish Kanani, Sangwan Lee +2
Hybrid Transformer-Mamba large language models (LLMs) enhance long-context efficiency, but their heterogeneous computation and communication patterns complicate efficient hardware…
APEX: Adaptive Expert Prefetching for Memory-Efficient Edge MoE Inference
Alish Kanani, Layan Badawi, Umit Y. Ogras
Mixture-of-Experts (MoE) models are attractive for edge deployment because they provide high model capacity while activating only a small subset of parameters per token, improving…
Uni-SFU: Algorithm-HW Co-Design for Universal SFUs via Mixed-Degree Piecewise Approximation
Miao Sun, Yucheng Huang, Mingcong Cao +3
Nonlinear activation functions are essential to modern deep neural networks (DNNs), but their hardware evaluation places significant pressure on the special-function units (SFUs) o…
ReVolt: Power Delivery Network-Aware Voltage Droop Control for 2.5D PIM Chiplet Architectures
Vibhanshu Sharma, Alish Kanani, Miao Sun +3
Processing-in-memory (PIM)-based 2.5D multi-chiplet platforms are enablers for machine learning (ML) workloads. However, their performance is affected by the power delivery network…
CHIPSIM: A Co-Simulation Framework for Deep Learning on Chiplet-Based Systems
Lukas Pfromm, Alish Kanani, Harsh Sharma +3
Due to reduced manufacturing yields, traditional monolithic chips cannot keep up with the compute, memory, and communication demands of data-intensive applications, such as rapidly…