12 citations · 53 across the 13 of their papers we have counts for
4 papers · 1 filter
QTIA, a 2.5 or 10 Gbps 4-Channel Array Optical Receiver ASIC in a 65 nm CMOS Technology
H. Sun, X. Huang, C. -P. Chao +14
The Quad transimpedance and limiting amplifier (QTIA) is a 4-channel array optical receiver ASIC, developed using a 65 nm CMOS process. It is configurable between the bit rate of 2…
A radiation tolerant clock generator for the CMS Endcap Timing Layer readout chip
H. Sun, Q. Sun, S. Biereigel +14
We present the test results of a low jitter Phase Locked Loop (PLL) prototype chip for the CMS Endcap Timing Layer readout chip (ETROC). This chip is based on the improved version…
In-pixel automatic threshold calibration for the CMS Endcap Timing Layer readout chip
H. Sun, D. Gong, C. Edwards +10
We present the implementation and verification of an in-pixel automatic threshold calibration circuit for the CMS Endcap Timing Layer (ETL) in the High-Luminosity LHC upgrade. The…
Characterization of the CMS Endcap Timing Layer readout chip prototype with charge injection
H. Sun, D. Gong, W. Zhang +10
We present the characterization of a readout Application-Specific Integrated Circuit (ASIC) for the CMS Endcap Timing Layer (ETL) of the High-Luminosity LHC upgrade with charge inj…