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20192025
most citedBlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows

124 citations · 472 across the 16 of their papers we have counts for

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13 papers · 1 filter

cs.AR2025

Harmonia: Enhancing Data Placement and Migration in Hybrid Storage Systems via Multi-Agent Reinforcement Learning

Rakesh Nadig, Vamanan Arulchelvan, Rahul Bera +7

Modern high-performance computing (HPC) environments rely on hybrid storage systems (HSS) that combine multiple storage devices with diverse latency, bandwidth, endurance, and capa…

cs.AR2024

High-Performance Data Mapping for BNNs on PCM-based Integrated Photonics

Taha Shahroodi, Raphael Cardoso, Stephan Wong +3

State-of-the-Art (SotA) hardware implementations of Deep Neural Networks (DNNs) incur high latencies and costs. Binary Neural Networks (BNNs) are potential alternative solutions to…

cs.AR2024

Rethinking the Producer-Consumer Relationship in Modern DRAM-Based Systems

Minesh Patel, Taha Shahroodi, Aditya Manglik +4

Generational improvements to commodity DRAM throughout half a century have long solidified its prevalence as main memory across the computing industry. However, overcoming today's…

cs.AR2023

Swordfish: A Framework for Evaluating Deep Neural Network-based Basecalling using Computation-In-Memory with Non-Ideal Memristors

Taha Shahroodi, Gagandeep Singh, Mahdi Zahedi +6

Basecalling, an essential step in many genome analysis studies, relies on large Deep Neural Networks (DNNs) to achieve high accuracy. Unfortunately, these DNNs are computationally…

cs.AR2023

An In-Memory Architecture for High-Performance Long-Read Pre-Alignment Filtering

Taha Shahroodi, Michael Miao, Joel Lindegger +3

With the recent move towards sequencing of accurate long reads, finding solutions that support efficient analysis of these reads becomes more necessary. The long execution time req…

cs.AR2022

ApHMM: Accelerating Profile Hidden Markov Models for Fast and Energy-Efficient Genome Analysis

Can Firtina, Kamlesh Pillai, Gurpreet S. Kalsi +10

Profile hidden Markov models (pHMMs) are widely employed in various bioinformatics applications to identify similarities between biological sequences, such as DNA or protein sequen…

cs.AR2022

Demeter: A Fast and Energy-Efficient Food Profiler using Hyperdimensional Computing in Memory

Taha Shahroodi, Mahdi Zahedi, Can Firtina +4

Food profiling is an essential step in any food monitoring system needed to prevent health risks and potential frauds in the food industry. Significant improvements in sequencing t…

cs.AR2022★ 6 cited

A Case for Transparent Reliability in DRAM Systems

Minesh Patel, Taha Shahroodi, Aditya Manglik +4

Today's systems have diverse needs that are difficult to address using one-size-fits-all commodity DRAM. Unfortunately, although system designers can theoretically adapt commodity…

cs.AR2021★ 94 cited

Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning

Rahul Bera, Konstantinos Kanellopoulos, Anant V. Nori +3

Past research has proposed numerous hardware prefetching techniques, most of which rely on exploiting one specific type of program context information (e.g., program counter, cache…

cs.AR2021★ 60 cited

pLUTo: Enabling Massively Parallel Computation in DRAM via Lookup Tables

João Dinis Ferreira, Gabriel Falcao, Juan Gómez-Luna +8

Data movement between the main memory and the processor is a key contributor to execution time and energy consumption in memory-intensive applications. This data movement bottlenec…

cs.AR2021

BurstLink: Techniques for Energy-Efficient Conventional and Virtual Reality Video Display

Jawad Haj-Yahya, Jisung Park, Rahul Bera +5

Conventional planar video streaming is the most popular application in mobile systems and the rapid growth of 360 video content and virtual reality (VR) devices are accelerating th…

cs.AR2020★ 1 cited

Bit-Exact ECC Recovery (BEER): Determining DRAM On-Die ECC Functions by Exploiting DRAM Data Retention Characteristics

Minesh Patel, Jeremie S. Kim, Taha Shahroodi +2

Increasing single-cell DRAM error rates have pushed DRAM manufacturers to adopt on-die error-correction coding (ECC), which operates entirely within a DRAM chip to improve factory…

cs.AR2020★ 9 cited

CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off

Haocong Luo, Taha Shahroodi, Hasan Hassan +5

DRAM is the prevalent main memory technology, but its long access latency can limit the performance of many workloads. Although prior works provide DRAM designs that reduce DRAM ac…