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20182022
most citedBlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows

124 citations · 433 across the 23 of their papers we have counts for

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Showing 2021Show all

9 papers · 1 filter

cs.CR2021★ 73 cited

A Deeper Look into RowHammer`s Sensitivities: Experimental Analysis of Real DRAM Chips and Implications on Future Attacks and Defenses

Lois Orosa, Abdullah Giray Yağlıkçı, Haocong Luo +6

RowHammer is a circuit-level DRAM vulnerability where repeatedly accessing (i.e., hammering) a DRAM row can cause bit flips in physically nearby rows. The RowHammer vulnerability w…

cs.AR2021

CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations

Lois Orosa, Yaohua Wang, Mohammad Sadrosadati +10

DRAM is the dominant main memory technology used in modern computing systems. Computing systems implement a memory controller that interfaces with DRAM via DRAM commands. DRAM exec…

cs.DC2021

IChannels: Exploiting Current Management Mechanisms to Create Covert Channels in Modern Processors

Jawad Haj-Yahya, Jeremie S. Kim, A. Giray Yaglikci +5

To operate efficiently across a wide range of workloads with varying power requirements, a modern processor applies different current management mechanisms, which briefly throttle…

cs.AR2021★ 5 cited

DAMOV: A New Methodology and Benchmark Suite for Evaluating Data Movement Bottlenecks

Geraldo F. Oliveira, Juan Gómez-Luna, Lois Orosa +5

Data movement between the CPU and main memory is a first-order obstacle against improving performance, scalability, and energy efficiency in modern systems. Computer systems employ…

cs.AR2021★ 60 cited

pLUTo: Enabling Massively Parallel Computation in DRAM via Lookup Tables

João Dinis Ferreira, Gabriel Falcao, Juan Gómez-Luna +8

Data movement between the main memory and the processor is a key contributor to execution time and energy consumption in memory-intensive applications. This data movement bottlenec…

cs.AR2021

Reducing Solid-State Drive Read Latency by Optimizing Read-Retry

Jisung Park, Myungsuk Kim, Myoungjun Chun +3

3D NAND flash memory with advanced multi-level cell techniques provides high storage density, but suffers from significant performance degradation due to a large number of read-ret…

cs.AR2021

SynCron: Efficient Synchronization Support for Near-Data-Processing Architectures

Christina Giannoula, Nandita Vijaykumar, Nikela Papadopoulou +7

Near-Data-Processing (NDP) architectures present a promising way to alleviate data movement costs and can provide significant performance and energy benefits to parallel applicatio…

cs.CR2021★ 124 cited

BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows

Abdullah Giray Yağlıkçı, Minesh Patel, Jeremie S. Kim +9

Aggressive memory density scaling causes modern DRAM devices to suffer from RowHammer, a phenomenon where rapidly activating a DRAM row can cause bit-flips in physically-nearby row…

cs.CR2021★ 117 cited

Robust Machine Learning Systems: Challenges, Current Trends, Perspectives, and the Road Ahead

Muhammad Shafique, Mahum Naseer, Theocharis Theocharides +4

Machine Learning (ML) techniques have been rapidly adopted by smart Cyber-Physical Systems (CPS) and Internet-of-Things (IoT) due to their powerful decision-making capabilities. Ho…