3 papers
physics.ins-det2023★ 3 cited
MUX64, an analogue 64-to-1 multiplexer ASIC for the ATLAS High Granularity Timing Detector
Zifeng Xu, Li Zhang, Xing Huang +11
We present the design and the performance of MUX64, a 64-to-1 analogue multiplexer ASIC for the ATLAS High Granularity Timing Detector (HGTD). The MUX64 transmits one of its 64 inp…
physics.ins-det2023★ 2 cited
An FPGA-based readout chip emulator for the CMS ETL detector upgrade
L. Zhang, C. Edwards, D. Gong +9
We present an FPGA-based readout chip emulator board for the CMS Endcap Timing Layer (ETL) detector upgrade. The emulator board uses an Intel Cyclone 10 GX FPGA to emulate the digi…
physics.ins-det2023
A High-resolution Clock Phase Shifter Circuitry for ALTIROC
X. Huang, C. de La Taille, D. Gong +6
A high-resolution clock phase shifter is implemented to adjust the phase of multiple clocks at 40 MHz, 80 MHz, or 640 MHz in the ALTIROC chip. The phase shifter has a coarse-phase…