29 citations · 31 across the 3 of their papers we have counts for
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cs.AR2020
A Study of Runtime Adaptive Prefetching for STTRAM L1 Caches
Kyle Kuan, Tosiron Adegbija
Spin-Transfer Torque RAM (STTRAM) is a promising alternative to SRAM in on-chip caches due to several advantages. These advantages include non-volatility, low leakage, high integra…
cs.AR2019
HALLS: An Energy-Efficient Highly Adaptable Last Level STT-RAM Cache for Multicore Systems
Kyle Kuan, Tosiron Adegbija
Spin-Transfer Torque RAM (STT-RAM) is widely considered a promising alternative to SRAM in the memory hierarchy due to STT-RAM's non-volatility, low leakage power, high density, an…
cs.AR2019★ 29 cited
Energy-Efficient Runtime Adaptable L1 STT-RAM Cache Design
Kyle Kuan, Tosiron Adegbija
Much research has shown that applications have variable runtime cache requirements. In the context of the increasingly popular Spin-Transfer Torque RAM (STT-RAM) cache, the retenti…