32 citations · 65 across the 5 of their papers we have counts for
5 papers
SCART: Predicting STT-RAM Cache Retention Times Using Machine Learning
Dhruv Gajaria, Kyle Kuan, Tosiron Adegbija
Prior studies have shown that the retention time of the non-volatile spin-transfer torque RAM (STT-RAM) can be relaxed in order to reduce STT-RAM's write energy and latency. Howeve…
A Study of Runtime Adaptive Prefetching for STTRAM L1 Caches
Kyle Kuan, Tosiron Adegbija
Spin-Transfer Torque RAM (STTRAM) is a promising alternative to SRAM in on-chip caches due to several advantages. These advantages include non-volatility, low leakage, high integra…
Energy and Performance Analysis of STTRAM Caches for Mobile Applications
Kyle Kuan, Tosiron Adegbija
Spin-Transfer Torque RAMs (STTRAMs) have been shown to offer much promise for implementing emerging cache architectures. This paper studies the viability of STTRAM caches for mobil…
HALLS: An Energy-Efficient Highly Adaptable Last Level STT-RAM Cache for Multicore Systems
Kyle Kuan, Tosiron Adegbija
Spin-Transfer Torque RAM (STT-RAM) is widely considered a promising alternative to SRAM in the memory hierarchy due to STT-RAM's non-volatility, low leakage power, high density, an…
Energy-Efficient Runtime Adaptable L1 STT-RAM Cache Design
Kyle Kuan, Tosiron Adegbija
Much research has shown that applications have variable runtime cache requirements. In the context of the increasingly popular Spin-Transfer Torque RAM (STT-RAM) cache, the retenti…