activity
20182023
most citedCryogenic MOS Transistor Model

178 citations · 575 across the 10 of their papers we have counts for

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Showing 2018Show all

6 papers · 1 filter

cond-mat.mes-hall2018★ 19 cited

Revised theoretical limit of subthreshold swing in field-effect transistors

Arnout Beckers, Farzan Jazaeri, Christian Enz

This letter reports a temperature-dependent limit for the subthreshold swing in MOSFETs that deviates from the Boltzmann limit at deep-cryogenic temperatures. Below a critical temp…

cond-mat.mes-hall2018★ 127 cited

Characterization and Modeling of 28-nm FDSOI CMOS Technology down to Cryogenic Temperatures

Arnout Beckers, Farzan Jazaeri, Heorhii Bohuslavskyi +3

This paper presents an extensive characterization and modeling of a commercial 28-nm FDSOI CMOS process operating down to cryogenic temperatures. The important cryogenic phenomena…

physics.app-ph2018★ 49 cited

Design-oriented Modeling of 28 nm FDSOI CMOS Technology down to 4.2 K for Quantum Computing

Arnout Beckers, Farzan Jazaeri, Heorhii Bohuslavskyi +3

In this paper a commercial 28-nm FDSOI CMOS technology is characterized and modeled from room temperature down to 4.2 K. Here we explain the influence of incomplete ionization and…

cond-mat.mes-hall2018★ 178 cited

Cryogenic MOS Transistor Model

Arnout Beckers, Farzan Jazaeri, Christian Enz

This paper presents a physics-based analytical model for the MOS transistor operating continuously from room temperature down to liquid-helium temperature (4.2 K) from depletion to…

cond-mat.mes-hall2018★ 112 cited

Cryogenic Characterization of 28 nm Bulk CMOS Technology for Quantum Computing

Arnout Beckers, Farzan Jazaeri, Andrea Ruffino +3

This paper presents the first experimental investigation and physical discussion of the cryogenic behavior of a commercial 28 nm bulk CMOS technology. Here we extract the fundament…

physics.app-ph2018

Negative Capacitance as Digital and Analog Performance Booster for Complementary MOS Transistors

Ali Saeidi, Farzan Jazaeri, Igor Stolichnov +2

Boltzmann tyranny poses a fundamental limit to lowering the energy dissipation of conventional MOS devices, a minimum increase of the gate voltage, i.e. 60 mV, is required for a 10…