31 citations · 109 across the 14 of their papers we have counts for
7 papers · 1 filter
Hard-ODT: Hardware-Friendly Online Decision Tree Learning Algorithm and System
Zhe Lin, Sharad Sinha, Wei Zhang
Decision trees are machine learning models commonly used in various application scenarios. In the era of big data, traditional decision tree induction algorithms are not suitable f…
Scalable Light-Weight Integration of FPGA Based Accelerators with Chip Multi-Processors
Zhe Lin, Sharad Sinha, Hao Liang +2
Modern multicore systems are migrating from homogeneous systems to heterogeneous systems with accelerator-based computing in order to overcome the barriers of performance and power…
Decision Tree Based Hardware Power Monitoring for Run Time Dynamic Power Management in FPGA
Zhe Lin, Wei Zhang, Sharad Sinha
Fine-grained runtime power management techniques could be promising solutions for power reduction. Therefore, it is essential to establish accurate power monitoring schemes to obta…
An Ensemble Learning Approach for In-situ Monitoring of FPGA Dynamic Power
Zhe Lin, Sharad Sinha, Wei Zhang
As field-programmable gate arrays become prevalent in critical application domains, their power consumption is of high concern. In this paper, we present and evaluate a power monit…
Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA
Zhe Lin, Sharad Sinha, Wei Zhang
Decision trees are machine learning models commonly used in various application scenarios. In the era of big data, traditional decision tree induction algorithms are not suitable f…
HL-Pow: A Learning-Based Power Modeling Framework for High-Level Synthesis
Zhe Lin, Jieru Zhao, Sharad Sinha +1
High-level synthesis (HLS) enables designers to customize hardware designs efficiently. However, it is still challenging to foresee the correlation between power consumption and HL…