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20182026
most citedA RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures

57 citations · 173 across the 13 of their papers we have counts for

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cs.AR2026

SVRF: Efficient Register Storage for Long-Vector Architectures

Francesco Minervini, Lorenzo Deltetto, Osman Unsal +1

Vector processors exploit data-level parallelism to provide high computational throughput, but very long vectors can make the Vector Register File (VRF) a significant source of are…