activity
20182026
most citedA RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures

57 citations · 173 across the 13 of their papers we have counts for

collaborators

16 papers

cs.AR2026

SVRF: Efficient Register Storage for Long-Vector Architectures

Francesco Minervini, Lorenzo Deltetto, Osman Unsal +1

Vector processors exploit data-level parallelism to provide high computational throughput, but very long vectors can make the Vector Register File (VRF) a significant source of are…

cs.DB2025

On Usage of Non-Volatile Memory as Primary Storage for Database Management Systems

Naveed Ul Mustafa, Adri`a Armejach, Ozcan Ozturk +2

This paper explores the implications of employing non-volatile memory (NVM) as primary storage for a data base management system (DBMS). We investigate the modifications necessary…

cs.AR2021★ 57 cited

A RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures

Cristóbal Ramírez Lazo, César Alejandro Hernández, Oscar Palomar +3

Vector architectures lack tools for research. Consider the gem5 simulator, which is possibly the leading platform for computer-system architecture research. Unfortunately, gem5 doe…

cs.AR2021

MoRS: An Approximate Fault Modelling Framework for Reduced-Voltage SRAMs

İsmail Emir Yüksel, Behzad Salami, Oğuz Ergin +2

On-chip memory (usually based on Static RAMs-SRAMs) are crucial components for various computing devices including heterogeneous devices, e.g., GPUs, FPGAs, ASICs to achieve high p…

cs.DC2021★ 3 cited

Scrooge Attack: Undervolting ARM Processors for Profit

Christian Göttel, Konstantinos Parasyris, Osman Unsal +3

Latest ARM processors are approaching the computational power of x86 architectures while consuming much less energy. Consequently, supply follows demand with Amazon EC2, Equinix Me…

cs.AR2020

Understanding Power Consumption and Reliability of High-Bandwidth Memory with Voltage Underscaling

Seyed Saber Nabavi Larimi, Behzad Salami, Osman S. Unsal +3

Modern computing devices employ High-Bandwidth Memory (HBM) to meet their memory bandwidth requirements. An HBM-enabled device consists of multiple DRAM layers stacked on top of on…

cs.AR2020★ 36 cited

Exceeding Conservative Limits: A Consolidated Analysis on Modern Hardware Margins

George Papadimitriou, Athanasios Chatzidimitriou, Dimitris Gizopoulos +5

Modern large-scale computing systems (data centers, supercomputers, cloud and edge setups and high-end cyber-physical systems) employ heterogeneous architectures that consist of mu…

eess.SP2020

Power and Accuracy of Multi-Layer Perceptrons (MLPs) under Reduced-voltage FPGA BRAMs Operation

Behzad Salami, Osman Unsal, Adrian Cristal

In this paper, we exploit the aggressive supply voltage underscaling technique in Block RAMs (BRAMs) of Field Programmable Gate Arrays (FPGAs) to improve the energy efficiency of M…

cs.LG2020★ 49 cited

An Experimental Study of Reduced-Voltage Operation in Modern FPGAs for Neural Network Acceleration

Behzad Salami, Erhan Baturay Onural, Ismail Emir Yuksel +6

We empirically evaluate an undervolting technique, i.e., underscaling the circuit supply voltage below the nominal level, to improve the power-efficiency of Convolutional Neural Ne…

cs.LG2019

On the Resilience of Deep Learning for Reduced-voltage FPGAs

Kamyar Givaki, Behzad Salami, Reza Hojabr +6

Deep Neural Networks (DNNs) are inherently computation-intensive and also power-hungry. Hardware accelerators such as Field Programmable Gate Arrays (FPGAs) are a promising solutio…

cs.DC2019★ 2 cited

LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing

B. Salami, K. Parasyris, A. Cristal +42

The LEGaTO project leverages task-based programming models to provide a software ecosystem for Made in-Europe heterogeneous hardware composed of CPUs, GPUs, FPGAs and dataflow engi…

cs.DC2019

A Novel FPGA-Based High Throughput Accelerator For Binary Search Trees

Oyku Melikoglu, Oguz Ergin, Behzad Salami +3

This paper presents a deeply pipelined and massively parallel Binary Search Tree (BST) accelerator for Field Programmable Gate Arrays (FPGAs). Our design relies on the extremely pa…

cs.PF2019★ 2 cited

Hardware Versus Software Fault Injection of Modern Undervolted SRAMs

Muhammet Abdullah Soyturk, Konstantinos Parasyris, Behzad Salami +3

To improve power efficiency, researchers are experimenting with dynamically adjusting the supply voltage of systems below the nominal operating points. However, production systems…

cs.LG2019★ 4 cited

TauRieL: Targeting Traveling Salesman Problem with a deep reinforcement learning inspired architecture

Gorker Alp Malazgirt, Osman S. Unsal, Adrian Cristal Kestelman

In this paper, we propose TauRieL and target Traveling Salesman Problem (TSP) since it has broad applicability in theoretical and applied sciences. TauRieL utilizes an actor-critic…

cs.AR2019★ 20 cited

Evaluating Built-in ECC of FPGA on-chip Memories for the Mitigation of Undervolting Faults

Behzad Salami, Osman S. Unsal, Adrian Cristal Kestelman

Voltage underscaling below the nominal level is an effective solution for improving energy efficiency in digital circuits, e.g., Field Programmable Gate Arrays (FPGAs). However, fu…

cs.LG2018

On the Resilience of RTL NN Accelerators: Fault Characterization and Mitigation

Behzad Salami, Osman Unsal, Adrian Cristal

Machine Learning (ML) is making a strong resurgence in tune with the massive generation of unstructured data which in turn requires massive computational resources. Due to the inhe…