5 citations · 9 across the 6 of their papers we have counts for
Showing 2019Show all
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cs.NE2019★ 3 cited
Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators
Weiwen Jiang, Qiuwen Lou, Zheyu Yan +4
Co-exploration of neural architectures and hardware design is promising to simultaneously optimize network accuracy and hardware efficiency. However, state-of-the-art neural archit…
cs.ET2019
Nonvolatile Spintronic Memory Cells for Neural Networks
Andrew W. Stephan, Qiuwen Lou, Michael Niemier +2
A new spintronic nonvolatile memory cell analogous to 1T DRAM with non-destructive read is proposed. The cells can be used as neural computing units. A dual-circuit neural network…
cs.ET2019
Application-level Studies of Cellular Neural Network-based Hardware Accelerators
Qiuwen Lou, Indranil Palit, Tang Li +3
As cost and performance benefits associated with Moore's Law scaling slow, researchers are studying alternative architectures (e.g., based on analog and/or spiking circuits) and/or…