1 citations · 2 across the 6 of their papers we have counts for
7 papers
Model Synthesis for Communication Traces of System-on-Chip Designs
Hao Zheng, Md Rubel Ahmed, Parijat Mukherjee +2
Concise and abstract models of system-level behaviors are invaluable in design analysis, testing, and validation. In this paper, we consider the problem of inferring models from co…
Mining Message Flows from System-on-Chip Execution Traces
MD Rubel Ahmed, Hao Zheng, Parijat Mukherjee +2
Comprehensive and well-defined specifications are necessary to perform rigorous and thorough validation of system-on-chip (SoC) designs. Message flows specify how components of an…
Using Decision Diagrams to Compactly Represent the State Space for Explicit Model Checking
Hao Zheng, Andrew Price, Chris Myers
The enormous number of states reachable during explicit model checking is the main bottleneck for scalability. This paper presents approaches of using decision diagrams to represen…
Local State Space Analysis to Assist Partial Order Reduction
Hao Zheng, Yingying Zhang, Chris Myers
This paper presents an approach to more efficient partial order reduction for model checking concurrent systems. This approach utilizes a compositional reachability analysis to gen…
Mining Message Flows using Recurrent Neural Networks for System-on-Chip Designs
Yuting Cao, Parijat Mukherjee, Mahesh Ketkar +2
Comprehensive specifications are essential for various activities across the entire validation continuum for system-on-chip (SoC) designs. However, specifications are often ambiguo…
STAMINA: STochastic Approximate Model-checker for INfinite-state Analysis
Thakur Neupane, Chris J. Myers, Curtis Madsen +2
Stochastic model checking is a technique for analyzing systems that possess probabilistic characteristics. However, its scalability is limited as probabilistic models of real-world…