38 citations · 106 across the 12 of their papers we have counts for
3 papers · 1 filter
Hardware/Software Co-Design of RISC-V Extensions for Accelerating Sparse DNNs on FPGAs
Muhammad Sabih, Abrarul Karim, Jakob Wittmann +2
The customizability of RISC-V makes it an attractive choice for accelerating deep neural networks (DNNs). It can be achieved through instruction set extensions and corresponding cu…
Evaluation of CGRA Toolchains
Dominik Walter, Marita Halm, Daniel Seidel +4
Increasing demands for computing power also propel the need for energy-efficient SoC accelerator architectures. One class for such accelerators are so-called processor arrays, whic…
Mapping and Execution of Nested Loops on Processor Arrays: CGRAs vs. TCPAs
Dominik Walter, Marita Halm, Daniel Seidel +4
Increasing demands for computing power also propel the need for energy-efficient SoC accelerator architectures. One class of such accelerators are so-called processor arrays, which…