38 citations · 106 across the 12 of their papers we have counts for
5 papers · 1 filter
Evaluation of CGRA Toolchains
Dominik Walter, Marita Halm, Daniel Seidel +4
Increasing demands for computing power also propel the need for energy-efficient SoC accelerator architectures. One class for such accelerators are so-called processor arrays, whic…
Mapping and Execution of Nested Loops on Processor Arrays: CGRAs vs. TCPAs
Dominik Walter, Marita Halm, Daniel Seidel +4
Increasing demands for computing power also propel the need for energy-efficient SoC accelerator architectures. One class of such accelerators are so-called processor arrays, which…
To Spike or Not to Spike? A Quantitative Comparison of SNN and CNN FPGA Implementations
Patrick Plagwitz, Frank Hannig, Jürgen Teich +1
Convolutional Neural Networks (CNNs) are widely employed to solve various problems, e.g., image classification. Due to their compute- and data-intensive nature, CNN accelerators ha…
Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks
Jan Sommer, M. Akif Özkan, Oliver Keszocze +1
Spiking Neural Networks (SNNs) compute in an event-based matter to achieve a more efficient computation than standard Neural Networks. In SNNs, neuronal outputs (i.e. activations)…
DSP-Packing: Squeezing Low-precision Arithmetic into FPGA DSP Blocks
Jan Sommer, M. Akif Özkan, Oliver Keszocze +1
The number of Digital Signal Processor (DSP) resources available in Field Programmable Gate Arrays (FPGAs) is often quite limited. Therefore, full utilization of available DSP reso…