activity
20002026
most citedTMVA - Toolkit for Multivariate Data Analysis

787 citations · 3.2k across the 72 of their papers we have counts for

collaborators

79 papers

physics.ins-det2026

Review of prototypes developed in a 65 nm CMOS imaging technology in view of vertexing applications at a future lepton collider

Finn King, Matthew Lewis Franks, Yajun He +21

The OCTOPUS project addresses the development and characterization of monolithic active pixel sensors in the TPSCo 65 nm ISC technology in view of vertexing applications at a futur…

physics.ins-det2025

Characterization of the H2M Monolithic CMOS Sensor

Rafael Ballabriga, Eric Buschmann, Michael Campbell +29

The H2M (Hybrid-to-Monolithic) is a monolithic pixel sensor manufactured in a modified \SI{65}{\nano\meter}~CMOS imaging process with a small collection electrode. Its design addre…

physics.acc-ph2025

The Compact Linear ee Collider (CLIC)

Erik Adli, Gerardo D'Auria, Nuria Catalan Lasheras +22

The Compact Linear Collider (CLIC) is a TeV-scale high-luminosity linear ee collider studied by the international CLIC and CLICdp collaborations. CLIC uses a two-beam accel…

physics.ins-det2025

Caribou - A versatile data acquisition system for silicon pixel detector prototyping

Younes Otarid, Mathieu Benoit, Eric Buschmann +7

Caribou is a versatile data acquisition system used in multiple collaborative frameworks (CERN EP R&D, DRD3, AIDAinnova, Tangerine) for laboratory and test-beam qualification of no…

physics.ins-det2024★ 7 cited

Simulating Monolithic Active Pixel Sensors: A Technology-Independent Approach Using Generic Doping Profiles

Håkan Wennlöf, Dominik Dannheim, Manuel Del Rio Viera +17

The optimisation of the sensitive region of CMOS sensors with complex non-uniform electric fields requires precise simulations, and this can be achieved by a combination of electro…

physics.ins-det2024

Characterisation of analogue Monolithic Active Pixel Sensor test structures implemented in a 65 nm CMOS imaging process

Gianluca Aglieri Rinella, Giacomo Alocco, Matias Antonelli +91

Analogue test structures were fabricated using the Tower Partners Semiconductor Co. CMOS 65 nm ISC process. The purpose was to characterise and qualify this process and to optimise…