40 citations · 239 across the 24 of their papers we have counts for
24 papers
Logic Design of Neural Networks for High-Throughput and Low-Power Applications
Kangwei Xu, Grace Li Zhang, Ulf Schlichtmann +1
Neural networks (NNs) have been successfully deployed in various fields. In NNs, a large number of multiplyaccumulate (MAC) operations need to be performed. Most existing digital h…
MLonMCU: TinyML Benchmarking with Fast Retargeting
Philipp van Kempen, Rafael Stahl, Daniel Mueller-Gritschneder +1
While there exist many ways to deploy machine learning models on microcontrollers, it is non-trivial to choose the optimal combination of frameworks and targets for a given applica…
VirtualSync+: Timing Optimization with Virtual Synchronization
Grace Li Zhang, Bing Li, Xing Huang +4
In digital circuit designs, sequential components such as flip-flops are used to synchronize signal propagations. Logic computations are aligned at and thus isolated by flip-flop s…
Differentially Evolving Memory Ensembles: Pareto Optimization based on Computational Intelligence for Embedded Memories on a System Level
Felix Last, Ceren Yeni, Ulf Schlichtmann
As the relative power, performance, and area (PPA) impact of embedded memories continues to grow, proper parameterization of each of the thousands of memories on a chip is essentia…
Predicting Memory Compiler Performance Outputs using Feed-Forward Neural Networks
Felix Last, Max Haeberlein, Ulf Schlichtmann
Typical semiconductor chips include thousands of mostly small memories. As memories contribute an estimated 25% to 40% to the overall power, performance, and area (PPA) of a chip,…
TimingCamouflage+: Netlist Security Enhancement with Unconventional Timing (with Appendix)
Grace Li Zhang, Bing Li, Meng Li +5
With recent advances in reverse engineering, attackers can reconstruct a netlist to counterfeit chips by opening the die and scanning all layers of authentic chips. This relatively…