activity
20172020
most citedA scalable multi-core architecture with heterogeneous memory structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs)

659 citations · 659 across the 1 of their papers we have counts for

collaborators

10 papers

cs.ET2020

Ultra-Low-Power FDSOI Neural Circuits for Extreme-Edge Neuromorphic Intelligence

Arianna Rubino, Can Livanelioglu, Ning Qiao +2

Recent years have seen an increasing interest in the development of artificial intelligence circuits and systems for edge computing applications. In-memory computing mixed-signal n…

cs.ET2019

Automatic gain control of ultra-low leakage synaptic scaling homeostatic plasticity circuits

Ning Qiao, Giacomo Indiveri, Chiara Bartolozzi

Homeostatic plasticity is a stabilizing mechanism that allows neural systems to maintain their activity around a functional operating point. This is an extremely useful mechanism f…

cs.ET2019

Scaling mixed-signal neuromorphic processors to 28 nm FD-SOI technologies

Ning Qiao, Giacomo Inidveri

As processes continue to scale aggressively, the design of deep sub-micron, mixed-signal design is becoming more and more challenging. In this paper we present an analysis of scali…

cs.ET2019

An auto-scaling wide dynamic range current to frequency converter for real-time monitoring of signals in neuromorphic systems

Ning Qiao, Giacomo Indiveri

Neuromorphic systems typically employ current-mode circuits that model neural dynamics and produce output currents that range from few pico-Amperes to hundreds of micro-Amperes. On…

cs.ET2019

Analog circuits for mixed-signal neuromorphic computing architectures in 28 nm FD-SOI technology

Ning Qiao, Giacomo Indiveri

Developing mixed-signal analog-digital neuromorphic circuits in advanced scaled processes poses significant design challenges. We present compact and energy efficient sub-threshold…

cs.AR2019

A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems

Ning Qiao, Giacomo Indiveri

Neuromorphic systems typically use the Address-Event Representation (AER) to transmit signals among nodes, cores, and chips. Communication of Address-Events (AEs) between neuromorp…