Performance Analysis of a Ge/Si Core/Shell Nanowire Field Effect Transistor

Abstract

We analyze the performance of a recently reported Ge/Si core/shell nanowire transistor using a semiclassical, ballistic transport model and an sp3s*d5 tight-binding treatment of the electronic structure. Comparison of the measured performance of the device with the effects of series resistance removed to the simulated result assuming ballistic transport shows that the experimental device operates between 60 to 85% of the ballistic limit. For this ~15 nm diameter Ge nanowire, we also find that 14-18 modes are occupied at room temperature under ON-current conditions with ION/IOFF=100. To observe true one dimensional transport in a <110> Ge nanowire transistor, the nanowire diameter would have to be much less than about 5 nm. The methodology described here should prove useful for analyzing and comparing on common basis nanowire transistors of various materials and structures.

References in corpus (2)

• Boundary conditions for the electronic structure of finite-extent, embedded semiconductor nanostructures
• Performance Evaluation of Ballistic Silicon Nanowire Transistors with Atomic-basis Dispersion Relations

Cited by in corpus (8)

• Bandstructure Effects in Silicon Nanowire Electron Transport
• Strong and Tunable Spin-Orbit Coupling of One-Dimensional Holes in Ge/Si Core/Shell Nanowires
• Atomistic simulations of low-field mobility in Si nanowires: Influence of confinement and orientation
• On the Bandstructure Velocity and Ballistic Current of Ultra Narrow Silicon Nanowire Transistors as a Function of Cross Section Size, Orientation and Bias
• Bandstructure and mobility variations in p-type Silicon nanowires under electrostatic gate field
• Topological energy gaps in the [111]-oriented InAs/GaSb and GaSb/InAs core-shell nanowires
• The structure and properties of vacancies in Si nano-crystals calculated by real-space pseudopotential methods
• Spin Polarized Transport in Core Shell Nanowire of Silicon and Germanium