Development of LGAD Sensor Technology on 12 inch Wafers for 3D Integration with advanced CMOS processes

Abstract

We report on the design, simulation, and initial testing of Low Gain Avalanche Diode (LGAD) sensors fabricated in 65 nm CMOS technology on 12 inch wafers. These sensors were developed as part of a project to demonstrate full wafer to wafer hybrid bonding of sensors and 28 nm Readout Integrated Circuits (ROICs). The sensor submission and test included standard (reach-through) LGADs, AC coupled LGADs, and Deep Junction LGADs as well as various test structures.

12 Pagesd, 5 Figures, presented by Julie Segal at the Ulitima 26 conference