Superparamagnetic and Stochastic-Write Magnetic Tunnel Junctions for High-Speed True Random Number Generation in Advanced Computing
arXiv:2509.13469 · doi:10.1088/1361-6463/ae27da
Abstract
We review two magnetic tunnel junction (MTJ) approaches for compact, low-power, CMOS-integrated true random number generation (TRNG). The first employs passive-read, easy-plane superparamagnetic MTJs (sMTJs) that generate thermal-fluctuation-driven bit streams at --~Gb/s per device. The second uses MTJs with magnetically stable free layers, operated with stochastic write pulses to achieve switching probabilities of about (\emph{i.e.}, write error rates of ), achieving ~Gb/s per device; we refer to these as stochastic-write MTJs (SW-MTJs). Randomness from both approaches has been validated using the NIST~SP800 test suites. The sMTJ approach uses a read-only cell with low power and can be compatible with most advanced CMOS nodes, while SW-MTJs leverage standard CMOS MTJ process flows, enabling co-integration with embedded spin-transfer torque magnetic random access memory (STT-MRAM). Both approaches can achieve deep sub-0.01~m MTJ footprints and offer orders-of-magnitude better energy efficiency than CPU/GPU-based generators, enabling placement near logic for high-throughput random bit-streams for probabilistic computing, statistical modeling, and cryptography. In terms of performance, sMTJs generally suit applications requiring very high data-rate random bits near logic processors, such as probabilistic computing or large-scale statistical modeling. By contrast, SW-MTJs are an attractive option for edge-oriented microcontrollers, providing entropy sources for computing or cryptographic enhancement. We highlight the strengths, limitations, and integration challenges of each approach, emphasizing the need to reduce device-to-device variability in sMTJs -- particularly by mitigating magnetostriction-induced in-plane anisotropy -- and to improve temporal stability in SW-MTJs for robust, large-scale deployment.
11 pages, 5 figures
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