FPGA Implementation of Low-Power Multiplierless Pre-Processing Free Chromatic Dispersion Equalizer
arXiv:2412.17536
Abstract
We present a novel time-domain chromatic dispersion equalizer, implemented on FPGA, eliminating pre-processing and multipliers, achieving up to 54.3% energy savings over 80-1280 km with a simple, low-power design.
Paper Accepted at OFC 2025