High-Throughput VLSI architecture for Soft-Decision decoding with ORBGRAND

Abstract

Guessing Random Additive Noise Decoding (GRAND) is a recently proposed approximate Maximum Likelihood (ML) decoding technique that can decode any linear error-correcting block code. Ordered Reliability Bits GRAND (ORBGRAND) is a powerful variant of GRAND, which outperforms the original GRAND technique by generating error patterns in a specific order. Moreover, their simplicity at the algorithm level renders GRAND family a desirable candidate for applications that demand very high throughput. This work reports the first-ever hardware architecture for ORBGRAND, which achieves an average throughput of up to $42.5$ Gbps for a code length of $128$ at an SNR of $10$ dB. Moreover, the proposed hardware can be used to decode any code provided the length and rate constraints. Compared to the state-of-the-art fast dynamic successive cancellation flip decoder (Fast-DSCF) using a 5G polar $(128,105)$ code, the proposed VLSI implementation has $49\times$ more average throughput while maintaining similar decoding performance.

arXiv commentPlease note that a mislabeling in Fig. 1 has occurred in the IEEE Xplore version of this paper. This error has been corrected in this version of the manuscript. (Accepted in ICASSP 2021)

References in corpus (4)

• Channel polarization: A method for constructing capacity-achieving codes for symmetric binary-input memoryless channels
• Capacity-achieving Guessing Random Additive Noise Decoding (GRAND)
• Ordered Reliability Bits Guessing Random Additive Noise Decoding
• Practical Dynamic SC-Flip Polar Decoders: Algorithm and Implementation

Cited by in corpus (3)

• Ordered Reliability Bits Guessing Random Additive Noise Decoding
• High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND
• List-GRAND: A practical way to achieve Maximum Likelihood Decoding