An overdetermined linear equations-based time calibration method for fast sampling ASICs
arXiv:1907.02733 · doi:10.1016/j.nima.2018.11.029
Abstract
A novel time calibration method for waveform sampling application specific integrated circuits (ASICs) based on switched capacitor arrays (SCAs) is proposed in this paper. Precision timing extraction using SCA ASICs has been proved to be a promising technique in many high energy physics experiments. However, such ASICs suffer from irregular sampling intervals caused by process variations. Therefore, careful calibration is required to improve the time resolution of such systems. We evaluated the limitation of a popular method using the proportionality between voltage amplitude and sampling interval of adjacent switched-capacitor cells responding to either a sawtooth wave or a sine wave. The new time calibration method presented here utilizes the relationship between sampling intervals and the known input signal period to establish overdetermined linear equations, and the roots of these equations correspond to the actual sampling intervals. We applied this new method to a pulse timing test with an ASIC designed by our team, and the test results indicate that the new time calibration method is effective.
References in corpus (8)
- A 15 GSa/s, 1.5 GHz Bandwidth Waveform Digitizing ASIC
- Signal Processing for Pico-second Resolution Timing Measurements
- Performance of the front-end electronics of the ANTARES neutrino telescope
- TARGET: A multi-channel digitizer chip for very-high-energy gamma-ray telescopes
- Novel Calibration Method for Switched Capacitor Arrays Enables Time Measurements with Sub-Picosecond Resolution
- Analysis techniques and performance of the Domino Ring Sampler version 4 based readout for the MAGIC telescopes
- The SST Multi-G-Sample/s Switched Capacitor Array Waveform Recorder with Flexible Trigger and Picosecond-Level Timing Accuracy
- Waveform Timing Performance of a 5 GS/s Fast Pulse Sampling Module with DRS4