A neuromorphic systems approach to in-memory computing with non-ideal memristive devices: From mitigation to exploitation

Abstract

Memristive devices represent a promising technology for building neuromorphic electronic systems. In addition to their compactness and non-volatility features, they are characterized by computationally relevant physical properties, such as state-dependence, non-linear conductance changes, and intrinsic variability in both their switching threshold and conductance values, that make them ideal devices for emulating the bio-physics of real synapses. In this paper we present a spiking neural network architecture that supports the use of memristive devices as synaptic elements, and propose mixed-signal analog-digital interfacing circuits which mitigate the effect of variability in their conductance values and exploit their variability in the switching threshold, for implementing stochastic learning. The effect of device variability is mitigated by using pairs of memristive devices configured in a complementary push-pull mechanism and interfaced to a current-mode normalizer circuit. The stochastic learning mechanism is obtained by mapping the desired change in synaptic weight into a corresponding switching probability that is derived from the intrinsic stochastic behavior of memristive devices. We demonstrate the features of the CMOS circuits and apply the architecture proposed to a standard neural network hand-written digit classification benchmark based on the MNIST data-set. We evaluate the performance of the approach proposed on this benchmark using behavioral-level spiking neural network simulation, showing both the effect of the reduction in conductance variability produced by the current-mode normalizer circuit, and the increase in performance as a function of the number of memristive devices used in each synapse.

arXiv comment13 pages, 12 figures, accepted for Faraday Discussions

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• The importance of space and time in neuromorphic cognitive agents
• A Nanoscale Room-Temperature Multilayer Skyrmionic Synapse for Deep Spiking Neural Networks
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• Ferroelectric Tunneling Junctions for Edge Computing
• Online Training of Spiking Recurrent Neural Networks with Phase-Change Memory Synapses
• Improvement of FTJ on-current by work function engineering for massive parallel neuromorphic computing
• Neuromorphic In-Memory Computing Framework using Memtransistor Cross-bar based Support Vector Machines
• Mapping high-performance RNNs to in-memory neuromorphic chips
• 2022 Roadmap on Neuromorphic Computing and Engineering
• On-Chip Error-triggered Learning of Multi-layer Memristive Spiking Neural Networks