Mapping of Lattice Surgery-based Quantum Circuits on Surface Code Architectures
arXiv:1805.11127 · doi:10.1088/2058-9565/aadd1a
Abstract
Quantum error correction (QEC) and fault-tolerant (FT) mechanisms are essential for reliable quantum computing. However, QEC considerably increases the computation size up to four orders of magnitude. Moreover, FT implementation has specific requirements on qubit layouts, causing both resource and time overhead. Reducing spatial-temporal costs becomes critical since it is beneficial to decrease the failure rate of quantum computation. To this purpose, scalable qubit plane architectures and efficient mapping passes including placement and routing of qubits as well as scheduling of operations are needed. This paper proposes a full mapping process to execute lattice surgery-based quantum circuits on two surface code architectures, namely a checkerboard and a tile-based one. We show that the checkerboard architecture is 2x qubit-efficient but the tile-based one requires lower communication overhead in terms of both operation overhead (up to 86%) and latency overhead (up to 79%).
arXiv comment15 pages, 24 figures
References in corpus (20)
- Surface codes: Towards practical large-scale quantum computation
- Logic gates at the surface code threshold: Superconducting qubits poised for fault-tolerant quantum computing
- Topological quantum memory
- Universal Quantum Computation with ideal Clifford gates and noisy ancillas
- State preservation by repetitive error detection in a superconducting quantum circuit
- Fault-tolerant quantum computation with high threshold in two dimensions
- Topological fault-tolerance in cluster state quantum computation
- Surface code quantum computing by lattice surgery
- Experimental Comparison of Two Quantum Computing Architectures
- A fault-tolerant one-way quantum computer
- Magic state distillation with low overhead
- Detecting bit-flip errors in a logical qubit using stabilizer measurements
- Scalable quantum circuit and control for a superconducting surface code
- Compiling quantum circuits to realistic hardware architectures using temporal planners
- Multilevel distillation of magic states for quantum computing
- Fault-Tolerant High Level Quantum Circuits: Form, Compilation and Description
- Unifying gate-synthesis and magic state distillation
- Synthesis of Arbitrary Quantum Circuits to Topological Assembly
- Optimization of Lattice Surgery is NP-Hard
- Squash: A Scalable Quantum Mapper Considering Ancilla Sharing
Cited by in corpus (13)
- A Game of Surface Codes: Large-Scale Quantum Computing with Lattice Surgery
- Timing and resource-aware mapping of quantum circuits to superconducting processors
- Time-Sliced Quantum Circuit Partitioning for Modular Architectures
- Surface code compilation via edge-disjoint paths
- Partially Fault-tolerant Quantum Computing Architecture with Error-corrected Clifford Gates and Space-time Efficient Analog Rotations
- Fault-tolerant Quantum Error Correction on Near-term Quantum Processors using Flag and Bridge Qubits
- Interaction graph-based characterization of quantum benchmarks for improving quantum circuit mapping techniques
- A High Performance Compiler for Very Large Scale Surface Code Computations
- Integrated Analysis of Performance and Resource of Large-Scale Quantum Computing
- Universal resource-efficient topological measurement-based quantum computation via color-code-based cluster states
- Spatially parallel decoding for multi-qubit lattice surgery
- Lightcone Bounds for Quantum Circuit Mapping via Uncomplexity
- Lattice Surgery Compilation Beyond the Surface Code