Complete characterization of the directly implementable quantum gates used in the IBM quantum processors

Abstract

Quantum process tomography of each directly implementable quantum gate used in the IBM quantum processors is performed to compute gate error in order to check viability of complex quantum operations in the superconductivity-based quantum computers introduced by IBM and to compare the quality of these gates with the corresponding gates implemented using other technologies. Quantum process tomography (QPT) of C-NOT gates have been performed for three configurations available in IBM QX4 processor. For all the other allowed gates QPT have been performed for every allowed position (i.e., by placing the gates in different qubit lines) for IBM QX4 architecture, and thus, gate fidelities are obtained for both single-qubit and 2-qubit gates. Gate fidelities are observed to be lower than the corresponding values obtained in the other technologies, like NMR. Further, gate fidelities for all the single-qubit gates are obtained for IBM QX2 architecture by placing the gates in the third qubit line ($q[2]$). It's observed that the IBM QX4 architecture yields better gate fidelity compared to IBM QX2 in all cases except the case of $Y$ gate as far as the gate fidelity corresponding to the third qubit line is concerned. In general, the analysis performed here leads to a conclusion that a considerable technological improvement would be inevitable to achieve the desired scalability required for the realization of complex quantum operations.

Quantum Process tomography has been done for all the gates used in IBM QX2 and IBM QX4

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