Scalable effective temperature reduction for quantum annealers via nested quantum annealing correction

Abstract

Nested quantum annealing correction (NQAC) is an error correcting scheme for quantum annealing that allows for the encoding of a logical qubit into an arbitrarily large number of physical qubits. The encoding replaces each logical qubit by a complete graph of degree $C$. The nesting level $C$ represents the distance of the error-correcting code and controls the amount of protection against thermal and control errors. Theoretical mean-field analyses and empirical data obtained with a D-Wave Two quantum annealer (supporting up to $512$ qubits) showed that NQAC has the potential to achieve a scalable effective temperature reduction, $T_{\mathrm{eff}}\sim C^{-\eta }$, with $\eta \le 2$. We confirm that this scaling is preserved when NQAC is tested on a D-Wave 2000Q device (supporting up to $2048$ qubits). In addition, we show that NQAC can be also used in sampling problems to lower the effective temperature of a quantum annealer. Such effective temperature reduction is relevant for machine-learning applications. Since we demonstrate that NQAC achieves error correction via an effective reduction of the temperature of the quantum annealing device, our results address the problem of the "temperature scaling law for quantum annealers", which requires the temperature of quantum annealers to be reduced as problems of larger sizes are attempted to be solved.

12 pages, 5 figures

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• Improved Boltzmann machines with error corrected quantum annealing
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• Error suppression in adiabatic quantum computing with qubit ensembles
• The three phases of quantum annealing: fast, slow, and very slow
• A Quantum N-Queens Solver
• Demonstration of error-suppressed quantum annealing via boundary cancellation
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• Analog Errors in Quantum Annealing: Doom and Hope
• Assessing the performance of quantum annealing with nonlinear driving
• Frustration-enhanced quantum annealing correction models with additional inter-replica interactions
• Structural Comparison of Error Mitigation Methods for Ising Machines: Penalty-Spin Model versus Stacked Model