Evaluating Ising Processing Units with Integer Programming
arXiv:1707.00355 · doi:10.1007/978-3-030-19212-9_11
Abstract
The recent emergence of novel computational devices, such as adiabatic quantum computers, CMOS annealers, and optical parametric oscillators, present new opportunities for hybrid-optimization algorithms that are hardware accelerated by these devices. In this work, we propose the idea of an Ising processing unit as a computational abstraction for reasoning about these emerging devices. The challenges involved in using and benchmarking these devices are presented and commercial mixed integer programming solvers are proposed as a valuable tool for the validation of these disparate hardware platforms. The proposed validation methodology is demonstrated on a D-Wave 2X adiabatic quantum computer, one example of an Ising processing unit. The computational results demonstrate that the D-Wave hardware consistently produces high-quality solutions and suggests that as IPU technology matures it could become a valuable co-processor in hybrid-optimization algorithms.
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Cited by in corpus (5)
- Quantum Computing based Hybrid Solution Strategies for Large-scale Discrete-Continuous Optimization Problems
- Hybrid quantum annealing for larger-than-QPU lattice-structured problems
- Harnessing Intrinsic Noise in Memristor Hopfield Neural Networks for Combinatorial Optimization
- Quantum Integer Programming (QuIP) 47-779: Lecture Notes
- Exploring Non-Linear Programming Formulations in QuantumCircuitOpt for Optimal Circuit Design