Is error detection helpful on IBM 5Q chips ?
arXiv:1705.08957 · doi:10.26421/QIC18.11-12
Abstract
This paper reports on experiments realized on several IBM 5Q chips which show evidence for the advantage of using error detection and fault-tolerant design of quantum circuits. We show an average improvement of the task of sampling from states that can be fault-tolerantly prepared in the code, when using a fault-tolerant technique well suited to the layout of the chip. By showing that fault-tolerant quantum computation is already within our reach, the author hopes to encourage this approach.
17 pages, 13 figures, 6 tables
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- Active Readout Error Mitigation
- Readout Rebalancing for Near Term Quantum Computers
- Benchmarking near-term devices with quantum error correction
- Testing quantum fault tolerance on small systems
- Modeling low- and high-frequency noise in transmon qubits with resource-efficient measurement
- Implementing fault-tolerant non-Clifford gates using the [[8,3,2]] color code
- Towards a realistic GaAs-spin qubit device for a classical error-corrected quantum memory
- SymDPoly: symmetry-adapted moment relaxations for noncommutative polynomial optimization
- Analysing causal structures using Tsallis entropies
- Quantum error detection in qubit-resonator star architecture
- Exploring the Local Landscape in the Triangle Network
- Error detection without post-selection in adaptive quantum circuits