Inhomogeneity in barrier height at graphene/Si (GaAs) Schottky junctions
arXiv:1503.03766 · doi:10.1088/0957-4484/26/21/215702
Abstract
Graphene interfaced with a semiconductor forms a Schottky junction with rectifying properties, however, fluctuations in the Schottky barrier height are often observed. In this work, Schottky junctions are fabricated by transferring chemical vapor deposited monolayer graphene onto n-type Si and GaAs substrates. Temperature dependence of the barrier height and ideality factor are obtained by current-voltage measurements between 215 and 350 K. An increase in the zero bias barrier height and decrease in the ideality factor are observed with increasing temperature for both junctions. Such behavior is attributed to barrier inhomogeneities that arise from interfacial states as revealed by scanning tunneling microscopy/spectroscopy. Assuming a Gaussian distribution of the barrier heights, mean values of 1.14(+/-)0.14 eV and 0.76(+/-)0.10 eV are found for graphene Si and GaAs junctions, respectively. These findings provide insights into the barrier height inhomogeneities in graphene based Schottky junctions, essential for the integration of graphene with Si and GaAs device architectures.
19 pages, 6 figures
References in corpus (5)
- The electronic properties of graphene
- Vertical Field Effect Transistor based on Graphene-WS2 Heterostructures for flexible and transparent electronics
- Giant Phonon-induced Conductance in Scanning Tunneling Spectroscopy of Gate-tunable Graphene
- Intrinsic and extrinsic corrugation of monolayer graphene deposited on SiO2
- Spatially resolved spectroscopy of monolayer graphene on SiO2