299 citations
- American Rock Mechanics AssociationUS2 papers
- ETH ZurichCH2 papers
- Imperial College LondonGB2 papers
- Newcastle UniversityGB2 papers
- N. I. Lobachevsky State University of Nizhny NovgorodRU2 papers
- University College LondonGB2 papers
- University of BristolGB2 papers
- University of CambridgeGB2 papers
- University of LeicesterGB2 papers
- Beijing Institute of TechnologyCN1 paper
- Eindhoven University of TechnologyNL1 paper
- Fraunhofer Institute for Experimental Software EngineeringDE1 paper
6 papers · 1 filter
AI Benchmark: Running Deep Neural Networks on Android Smartphones
Andrey Ignatov, Radu Timofte, William Chou +4
Over the last years, the computational power of mobile devices such as smartphones and tablets has grown dramatically, reaching the level of desktop computers available not long ag…
Decoupled Strategy for Imbalanced Workloads in MapReduce Frameworks
Sergio Rivas-Gomez, Sai Narasimhamurthy, Keeran Brabazon +3
In this work, we consider the integration of MPI one-sided communication and non-blocking I/O in HPC-centric MapReduce frameworks. Using a decoupled strategy, we aim to overlap the…
OpSets: Sequential Specifications for Replicated Datatypes (Extended Version)
Martin Kleppmann, Victor B. F. Gomes, Dominic P. Mulligan +1
We introduce OpSets, an executable framework for specifying and reasoning about the semantics of replicated datatypes that provide eventual consistency in a distributed system, and…
Crossing the Architectural Barrier: Evaluating Representative Regions of Parallel HPC Applications
Alexandra Ferreron, Radhika Jagtap, Sascha Bischoff +1
Exascale computing will get mankind closer to solving important social, scientific and engineering problems. Due to high prototyping costs, High Performance Computing (HPC) system…
Integrating DRAM Power-Down Modes in gem5 and Quantifying their Impact
Radhika Jagtap, Matthias Jung, Wendy Elsasser +3
Across applications, DRAM is a significant contributor to the overall system power, with the DRAM access energy per bit up to three orders of magnitude higher compared to on-chip m…
The ARM Scalable Vector Extension
Nigel Stephens, Stuart Biles, Matthias Boettcher +10
This article describes the ARM Scalable Vector Extension (SVE). Several goals guided the design of the architecture. First was the need to extend the vector processing capability a…