activity
20172026
most citedMicroWalk: A Framework for Finding Side Channels in Binaries

69 citations · 322 across the 28 of their papers we have counts for

collaborators
Showing 2019Show all

6 papers · 1 filter

cs.CR2019★ 14 cited

JackHammer: Efficient Rowhammer on Heterogeneous FPGA-CPU Platforms

Zane Weissman, Thore Tiemann, Daniel Moghimi +3

After years of development, FPGAs are finally making an appearance on multi-tenant cloud servers. These heterogeneous FPGA-CPU architectures break common assumptions about isolatio…

cs.CR2019★ 24 cited

TPM-FAIL: TPM meets Timing and Lattice Attacks

Daniel Moghimi, Berk Sunar, Thomas Eisenbarth +1

Trusted Platform Module (TPM) serves as a hardware-based root of trust that protects cryptographic keys from privileged system and physical adversaries. In this work, we perform a…

cs.CR2019★ 34 cited

FortuneTeller: Predicting Microarchitectural Attacks via Unsupervised Deep Learning

Berk Gulmezoglu, Ahmad Moghimi, Thomas Eisenbarth +1

The growing security threat of microarchitectural attacks underlines the importance of robust security sensors and detection mechanisms at the hardware level. While there are studi…

cs.CR2019★ 39 cited

Fallout: Reading Kernel Writes From User Space

Marina Minkin, Daniel Moghimi, Moritz Lipp +7

Recently, out-of-order execution, an important performance optimization in modern high-end processors, has been revealed to pose a significant security threat, allowing information…

cs.CR2019★ 4 cited

Credential Masquerading and OpenSSL Spy: Exploring ROS 2 using DDS security

Vincenzo DiLuoffo, William R. Michalson, Berk Sunar

The trend toward autonomous robot deployments is on an upward growth curve. These robots are undertaking new tasks and are being integrated into society. Examples of this trend are…

cs.CR2019★ 41 cited

SPOILER: Speculative Load Hazards Boost Rowhammer and Cache Attacks

Saad Islam, Ahmad Moghimi, Ida Bruhns +4

Modern microarchitectures incorporate optimization techniques such as speculative loads and store forwarding to improve the memory bottleneck. The processor executes the load specu…