169 citations · 180 across the 4 of their papers we have counts for
4 papers
High-Throughput In-Memory Computing for Binary Deep Neural Networks with Monolithically Integrated RRAM and 90nm CMOS
Shihui Yin, Xiaoyu Sun, Shimeng Yu +1
Deep learning hardware designs have been bottlenecked by conventional memories such as SRAM due to density, leakage and parallel computing challenges. Resistive devices can address…
Automatic Compiler Based FPGA Accelerator for CNN Training
Shreyas Kolala Venkataramanaiah, Yufei Ma, Shihui Yin +4
Training of convolutional neural networks (CNNs)on embedded platforms to support on-device learning is earning vital importance in recent days. Designing flexible training hard-war…
Minimizing Area and Energy of Deep Learning Hardware Design Using Collective Low Precision and Structured Compression
Shihui Yin, Gaurav Srivastava, Shreyas K. Venkataramanaiah +3
Deep learning algorithms have shown tremendous success in many recognition tasks; however, these algorithms typically include a deep neural network (DNN) structure and a large numb…
Algorithm and Hardware Design of Discrete-Time Spiking Neural Networks Based on Back Propagation with Binary Activations
Shihui Yin, Shreyas K. Venkataramanaiah, Gregory K. Chen +4
We present a new back propagation based training algorithm for discrete-time spiking neural networks (SNN). Inspired by recent deep learning algorithms on binarized neural networks…