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20162026
most citedJammer Mitigation via Beam-Slicing for Low-Resolution mmWave Massive MU-MIMO

16 citations · 26 across the 20 of their papers we have counts for

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cs.AR2026

An Open-Source Standard-Cell Library for IHP 130nm Developed by Students

Oscar Castañeda, Lavinia Recchioni, Tobias Senti +26

Standard-cell libraries form the critical interface between transistor-level circuit design and automated digital design flows, yet their design and characterization are rarely cov…

cs.AR2025

Variable Point: A Number Format for Area- and Energy-Efficient Multiplication of High-Dynamic-Range Numbers

Seyed Hadi Mirfarshbafan, Nicolas Filliol, Oscar Castañeda +1

Fixed-point number representation is commonly employed in digital VLSI designs that have stringent hardware efficiency constraints. However, fixed-point numbers cover a relatively…

cs.AR2025

A 0.32 mm 100 Mb/s 223 mW ASIC in 22FDX for Joint Jammer Mitigation, Channel Estimation, and SIMO Data Detection

Jonas Elmiger, Fabian Stuber, Oscar Castañeda +2

We present the first single-input multiple-output (SIMO) receiver ASIC that jointly performs jammer mitigation, channel estimation, and data detection. The ASIC implements a recent…

cs.AR2025

A Jammer-Resilient 2.87 mm 1.28 MS/s 310 mW Multi-Antenna Synchronization ASIC in 65 nm

Flurin Arquint, Oscar Castañeda, Gian Marti +1

We present the first ASIC implementation of jammer-resilient multi-antenna time synchronization. The ASIC implements a recent algorithm that mitigates jamming attacks on synchroniz…

cs.AR2024

A Jammer-Mitigating 267 Mb/s 3.78 mm 583 mW 328 Multi-User MIMO Receiver in 22FDX

Florian Bucheli, Oscar Castañeda, Gian Marti +1

We present the first multi-user (MU) multiple-input multiple-output (MIMO) receiver ASIC that mitigates jamming attacks. The ASIC implements a recent nonlinear algorithm that perfo…

cs.AR2019

PPAC: A Versatile In-Memory Accelerator for Matrix-Vector-Product-Like Operations

Oscar Castañeda, Maria Bobbett, Alexandra Gallyas-Sanhueza +1

Processing in memory (PIM) moves computation into memories with the goal of improving throughput and energy-efficiency compared to traditional von Neumann-based architectures. Most…