49 citations · 71 across the 5 of their papers we have counts for
5 papers
High-Accuracy Inference in Neuromorphic Circuits using Hardware-Aware Training
Borna Obradovic, Titash Rakshit, Ryan Hatcher +2
Neuromorphic Multiply-And-Accumulate (MAC) circuits utilizing synaptic weight elements based on SRAM or novel Non-Volatile Memories (NVMs) provide a promising approach for highly e…
Modeling Transient Negative Capacitance in Steep-Slope FeFETs
Borna Obradovic, Titash Rakshit, Ryan Hatcher +2
We report on measurements and modeling of FE HfZrO/SiO2 Ferroelectric-Dielectric (FE-DE) FETs which indicate that many of the phenomena attributed to Negative Capacitance can be ex…
A Multi-Bit Neuromorphic Weight Cell using Ferroelectric FETs, suitable for SoC Integration
Borna Obradovic, Titash Rakshit, Ryan Hatcher +4
A multi-bit digital weight cell for high-performance, inference-only non-GPU-like neuromorphic accelerators is presented. The cell is designed with simplicity of peripheral circuit…
Parasitic Bipolar Leakage in III-V FETs: Impact of Substrate Architecture
Borna Obradovic, Titash Rakshit, Wei-E Wang +4
InGaAs-based Gate-all-Around (GAA) FETs with moderate to high In content are shown experimentally and theoretically to be unsuitable for low-leakage advanced CMOS nodes. The primar…
Lower limits of line resistance in nanocrystalline Back End of Line Cu interconnects
Ganesh Hegde, R. Chris Bowen, Mark S. Rodder
The strong non-linear increase in Cu interconnect line resistance with a decrease in linewidth presents a significant obstacle to their continued downscaling. In this letter we use…