6 citations · 9 across the 4 of their papers we have counts for
5 papers
A Roadmap for Enabling a Future-Proof In-Network Computing Data Plane Ecosystem
Daehyeok Kim, Nikita Lazarev, Tommy Tracy +7
As the vision of in-network computing becomes more mature, we see two parallel evolutionary trends. First, we see the evolution of richer, more demanding applications that require…
Partial Reconfiguration for Design Optimization
Marie Nguyen, Nathan Serafin, James C. Hoe
FPGA designers have traditionally shared a similar design methodology with ASIC designers. Most notably, at design time, FPGA designers commit to a fixed allocation of logic resour…
Time-Shared Execution of Realtime Computer Vision Pipelines by Dynamic Partial Reconfiguration
Marie Nguyen, James C. Hoe
This paper presents an FPGA runtime framework that demonstrates the feasibility of using dynamic partial reconfiguration (DPR) for time-sharing an FPGA by multiple realtime compute…
Amorphous Dynamic Partial Reconfiguration with Flexible Boundaries to Remove Fragmentation
Marie Nguyen, James C. Hoe
Dynamic partial reconfiguration (DPR) allows one region of an field-programmable gate array (FPGA) fabric to be reconfigured without affecting the operations on the rest of the fab…
Using Vivado-HLS for Structural Design: a NoC Case Study
Zhipeng Zhao, James C. Hoe
There have been ample successful examples of applying Xilinx Vivado's "function-to-module" high-level synthesis (HLS) where the subject is algorithmic in nature. In this work, we c…