3 citations · 3 across the 1 of their papers we have counts for
3 papers
cs.AR2020
Partial Reconfiguration for Design Optimization
Marie Nguyen, Nathan Serafin, James C. Hoe
FPGA designers have traditionally shared a similar design methodology with ASIC designers. Most notably, at design time, FPGA designers commit to a fixed allocation of logic resour…
cs.AR2018
Time-Shared Execution of Realtime Computer Vision Pipelines by Dynamic Partial Reconfiguration
Marie Nguyen, James C. Hoe
This paper presents an FPGA runtime framework that demonstrates the feasibility of using dynamic partial reconfiguration (DPR) for time-sharing an FPGA by multiple realtime compute…
cs.AR2017★ 3 cited
Amorphous Dynamic Partial Reconfiguration with Flexible Boundaries to Remove Fragmentation
Marie Nguyen, James C. Hoe
Dynamic partial reconfiguration (DPR) allows one region of an field-programmable gate array (FPGA) fabric to be reconfigured without affecting the operations on the rest of the fab…